Pinned toot

I decided to go with a keyed IDC connector, it's a little larger, but should be more robust and take a bit more abuse.

Companies keep leaking internal paths and stuff to me in datasheets, why?

Chonky connector (This might be a bit overkill)

Do people even use AFNOR cards? Like, is it worth supporting that one?

How bad of an idea would it be to have both ISO and AFNOR contact pads on the same card?

It can't be *that* bad....

Hmmm. To keep the ZIF socket or switch to an IDC connector...

How did this end up with 13 schematic pages?

Ugh, I might need add an ADC or four to this board, whoops.

I don't know if you can call the LED colours an easter egg or not, but oh well.

So all that's left to do is sort the power supply stuff for the 1v1, 1v8, 3v3, 5v0, and 21v0 rails, layout the decoupling caps for the FPGA, and then route everything so it's not crazy.

(Well that and document what's connected to what)

Almost done~

Wew, got the firmware building properly with Meson~

That's right, one whole USB. I don't know why they think I'd want more, one is more than enough...

No? I didn't either, but it's there, right between pins 9 and 10.

So, I was wondering why my DRC was complaining about a clearance issue, can you see it?

I'm sure that those two I²C lines aren't too long and *totally* won't get in the way of anything else I want to route on that layer, at all.

I'm really happy it's starting to actually look like a kinda finished product.

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